360.246 Simulation of Semiconductor Device Fabrication
This course is in all assigned curricula part of the STEOP.
This course is in at least 1 assigned curriculum part of the STEOP.

2023S, VU, 3.0h, 4.0EC
TUWEL

Properties

  • Semester hours: 3.0
  • Credits: 4.0
  • Type: VU Lecture and Exercise
  • Format: Presence

Learning outcomes

After successful completion of the course, students are able to identify which processes are necessary to fabricate advanced complementary metal oxide semiconductor (CMOS) devices. Furthermore, the students will be able to identify and work with software tools which are available for the simulation of these processes and will gain experience in using them. The students will also be able to work in a process technology computer aided design (TCAD) environment and program simple models using relevant methods (i.e. level-sets, ray tracing, etc.). Ultimately, the students will be able to identify the principal problems in process simulation, apply relevant methods to solve them, and with the aid of the exercise component apply those solutions in a simulation environment. They will be able to identify the difference between explicit and implicit geometrical representations and their benefits and drawbacks.

After successfully completing the exercises, the students will be able to understand how process simulations are performed. They will also be able to use existing TCAD tools, but also develop some aspects of process TCAD tools. It is envisioned that students who are successful in this course can afterwards apply their knowledge in a semiconductor company, which uses a prescribed simulation software, or to design a simulation software themselves.

Subject of course

The course will give an overview of the processing steps used for the fabrication of advanced semiconductor devices and means to physically model them. Students will develop a core understanding of how advanced transistors are fabricated as well as the methods and models used in industry to simulate the required processing steps. The course will center around a current technology, such as the fabrication of the 14nm intel finFET device. The hands-on exercise component will allow the students to understand how process simulation tools are designed and programmed as well as how to use commercial tools to design modern transistor structures. The simulation tools and exercises will primarily deal with feature scale modeling, while reactor scale modeling will be addressed theoretically during the lecture component.

The geometrical representations that will be described include:

  • Explicit definition using triangular and tetrahedral meshes
  • Implicit definition using level sets
  • Hybrid definition using cell-based methods

The computational methods described and applied will include:

  • Monte Carlo method for solving differential equations
  • Ray tracing for particle transport in the feature scale

Teaching methods

The teaching methods used in the course will include a combination of four learning styles: visual, verbal, logical, and solitary. The visual methods will include showing simulation results and changing geometries under various processes, while the verbal will primarily be used during the course of the teaching in the lectures. Logical and solitary learning will be applied during the exercises, where the students will have to critically analyze a problem and devise a solution on their own.

Mode of examination

Oral

Additional information

To settle on a weekly time slot for the lecture, please provide your availability for the first lecture here:

https://www.termino.gv.at/meet/p/2abb4c0096fb8359912a7227916eae8e-196960

Lecturers

Institute

Course dates

DayTimeDateLocationDescription
Tue13:00 - 15:0007.03.2023 - 27.06.2023 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Simulation of Semiconductor Device Fabrication - Single appointments
DayDateTimeLocationDescription
Tue07.03.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue14.03.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue21.03.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue28.03.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue18.04.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue25.04.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue02.05.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue09.05.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue16.05.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue23.05.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue06.06.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue13.06.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue20.06.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture
Tue27.06.202313:00 - 15:00 Gußhausstraße 27-29, 5th floor, room CD0513Lecture

Examination modalities

There will be three graded exercises, each carrying 20% of the overall course grade.
A final oral exam will carry 40% of the overall grade.
The students must not fail more than one practical exercise and must pass (>50%) the final exam.

Course registration

Begin End Deregistration end
31.01.2023 00:00 30.03.2023 23:59 29.04.2023 23:59

Curricula

Study CodeObligationSemesterPrecon.Info
066 646 Computational Science and Engineering Not specified
710 FW Elective Courses - Electrical Engineering Not specified

Literature

No lecture notes are available.

Previous knowledge

Basic knowledge in programming in C / C++ is essential.

Some knowledge about semiconductor devices is desired, but not essential. While not a required prerequisite, the course: An Introduction to Semiconductor Physics and Devices or similar would help the students put this course into a broader semiconductor industry context.

Language

English