360.231 Emerging memory and logic devices
This course is in all assigned curricula part of the STEOP.
This course is in at least 1 assigned curriculum part of the STEOP.

2023S, VO, 2.0h, 3.0EC


  • Semester hours: 2.0
  • Credits: 3.0
  • Type: VO Lecture
  • Format: Presence

Learning outcomes

After successful completion of the course, students are able to

  • understand the concepts and the physical basics of emerging memory and logic devices
  • identify possible applications for these new technologies
  • name current challenges and possible solutions in the field of microelectronics
  • select suitable methods and TCAD software to solve relevant problems numerically

Subject of course

The students receive an insight into modern high-performance MOSFETs for ultra large scale integration. Special emphasis is put on performance enhancement of current CMOS devices by applying stress and exploring novel design (SOI, Fin and nanowire FETs, single, double, and 3D tri-gate devices, junction-free MOSFETs) as well FETs with germanium and III-V semiconductor high-mobility channels.

Electron spin is considered as an alternative to the charge degree of freedom for non-volatile storage and information processing. Special emphasis is put on the physical description of the operation of spin FET, spin MOSFET and other spin transistors. Approaches to reduce spin relaxation in silicon are considered. Spin is also used to develop new types of memories. Magnetization direction in modern magnetic tunnel junctions can be switched fast by purely electrical means. This makes spin transfer torque magnetic memory a perfect candidate to replace CMOS in future static and dynamic random access memories. A great advantage of the new memory is that it does not need refreshing. As in other types of resistive non-volatile memories, magnetic memory preserves its state even when the power is off.

New ideas for spin switches and memories including those based on domain wall motion and giant spin Hall effect are considered.  The concepts of spin communication, use of anti-ferromagnetic materials and topological insulators for spintronics applications are described.

Teaching methods

Lectures, implementation of simulation exercises.

Mode of examination


Additional information

Time: Thursday, 10:00 - 12:00

Location: E360 Room number CD 0520

Start: 02-March-2023




Examination modalities

Participation in the tutorial and oral exam.

Course registration

Not necessary


Study CodeObligationSemesterPrecon.Info
066 504 Master programme Embedded Systems Mandatory elective
066 508 Microelectronics and Photonics Mandatory elective


A script is available in the course of the lecture.